Texas Instruments /MSP432E401Y /SYSCTL /DCGCEPHY

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DCGCEPHY

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCTL_DCGCEPHY_D0)SYSCTL_DCGCEPHY_D0

Description

Ethernet PHY Deep-Sleep Mode Clock Gating Control

Fields

SYSCTL_DCGCEPHY_D0

PHY Module Deep-Sleep Mode Clock Gating Control

Links

() ()